Technical Field
This disclosure relates generally to a credit-based processor energy consumption rate limiting system.
Description of the Related Art
Many devices include multiple processor cores. Processor cores can be significant energy consumers, especially under certain workloads. Accordingly, there can be operating points (combinations of supply voltage magnitude and operating frequency) at which, if all the processor cores are actively executing, the device is at risk of exceeding a capacity of a power supply in the device. That is, the power supply is only capable of sourcing a certain amount of energy per unit time (e.g., a clock cycle). If one or more processor cores are actively executing energy consumption-intensive workloads at some operating points, the resulting aggregate energy consumption rate can, in some cases, exceed the capacity of the power supply. Exceeding the capacity of the power supply may cause erroneous operation (e.g., the supply voltage magnitude may drop to a point at which the device no longer operates properly at the operating frequency).
One way to limit the energy consumption rate of the device is to reduce the rate at which the workloads are executed, a process called throttling. One form of throttling involves preventing a processor core from executing a portion of a workload during a current clock cycle, instead inserting a stall instruction into a pipeline of the processor core. However, when multiple processor cores receive energy from the same power supply within a window of time, some throttling protocols may result in the processor cores all determining to throttle, for example, during a same clock cycle and all determining to resume execution during a same clock cycle. Processor cores throttling or resuming during a same clock cycle may inject undesired noise into the power supply network. The noise in the power supply network may cause erroneous operation or may otherwise waste energy (e.g., through increased voltage guard band requirements).